System-on-chip protocol compliance verification using interval property checking [Elektronische Ressource] = Verifikation von System-on-Chip-Protokollimplementierungen durch intervallbasierte Eigenschaftsprüfung / von Duc-Minh Nguyen

System-on-Chip Protocol Compliance VerificationUsing Interval Property CheckingVerifikation von System-on-Chip-Protokollimplementierungendurch intervallbasierte Eigenschaftspruf¨ ungVom Fachbereich Elektrotechnik und Informationstechnikder Technischen Universita¨t Kaiserslauternzur Erlangung des akademischen GradesDoktor der Ingenieurwissenschaften (Dr.-Ing.)genehmigte DissertationvonM.Sc. Duc-Minh Nguyengeb. in Hanoi, VietnamD 386Dekan: Univ.-Prof. Dr. Steven LiuGutachter: Prof. Dr.-Ing. Wolfgang Kunz,Technische Universita¨t KaiserslauternProf. Dr.-Ing. Hans Eveking,Technische Unversita¨t DarmstadtDatum der Disputation: 16 Januar 2009iiAcknowledgmentsThis thesis is the result of5 year work done at the Electronic Design Automation Group atthe University of Kaiserslautern. Additionally, the problem of false negatives in intervalproperty checking was discovered during a short but intensive stay at the Formal Verifica-tion Section in Infineon Technologies AG, that is now OneSpin Solutions GmbH. Thereare a numerous people who have contributed to this research in various ways and whom Iwould like to thank.First of all, I am deeply indebted to my advisor, Prof. Wolfgang Kunz. He has pro-vided me not only the opportunity to work in very interesting research field but also con-siderable guide and constant support during my long stay with his group.