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Measuring Benchmark Similarity Using Inherent Program Characteristics
† † ‡ † Ajay Joshi , Aashish Phansalkar , Lieven Eeckhout , and Lizy K. John
{ajoshi, aashish, ljohn}@ece.utexas.edu, leeckhou@elis.ugent.be
† ‡
The University of Texas at Austin Ghent University, Belgium
Abstract: This paper proposes a methodology for measuring the similarity between
programs based on their inherent microarchitecture-independent characteristics, and
demonstrates two applications for it: (i) finding a representative subset of programs from
benchmark suites and (ii) studying the evolution of four generations of SPEC CPU benchmark
suites. Using the proposed methodology we find a representative subset of programs from three
popular benchmark suites - SPEC CPU2000, MediaBench, and MiBench. We show that this
subset of representative programs can be effectively used to estimate the average benchmark
suite IPC, L1 data cache miss-rates, and speedup on 11 machines with different ISAs and
microarchitectures – this enables one to save simulation time with little loss in accuracy. From
our study of the similarity between the four generations of SPEC CPU benchmark suites, we find
that other than a dramatic increase in the dynamic instruction count and increasingly poor
temporal data locality, the inherent program characteristics have ...
† † ‡ † Ajay Joshi , Aashish Phansalkar , Lieven Eeckhout , and Lizy K. John
{ajoshi, aashish, ljohn}@ece.utexas.edu, leeckhou@elis.ugent.be
† ‡
The University of Texas at Austin Ghent University, Belgium
Abstract: This paper proposes a methodology for measuring the similarity between
programs based on their inherent microarchitecture-independent characteristics, and
demonstrates two applications for it: (i) finding a representative subset of programs from
benchmark suites and (ii) studying the evolution of four generations of SPEC CPU benchmark
suites. Using the proposed methodology we find a representative subset of programs from three
popular benchmark suites - SPEC CPU2000, MediaBench, and MiBench. We show that this
subset of representative programs can be effectively used to estimate the average benchmark
suite IPC, L1 data cache miss-rates, and speedup on 11 machines with different ISAs and
microarchitectures – this enables one to save simulation time with little loss in accuracy. From
our study of the similarity between the four generations of SPEC CPU benchmark suites, we find
that other than a dramatic increase in the dynamic instruction count and increasingly poor
temporal data locality, the inherent program characteristics have ...
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English