Fault-tolerant integrated interconnections based on built-in self-repair and codes [Elektronische Ressource] / Daniel Scheit. Betreuer: Heinrich Theodor Vierhaus

Fault-tolerant integrated interconnectionsbased on built-in self-repair and codesVon der Fakulta¨t fu¨r Mathematik, Naturwissenschaften undInformatik der Brandenburgischen Technischen Universitat Cottbus¨zur Erlangung des akademischen GradesDoktor der Ingenieurwissenschaften (Dr.-Ing)genehmigte Dissertationvorgelegt vonDiplom-ElektrotechnikerDaniel ScheitGeboren am 11.04.1981 in Frankfurt/OderGutachter: Prof. Dr. H. T. VierhausGutachter: Prof. Dr. M. S. ReordaGutachter: Prof. Dr. M. Go¨sselTag der mundlichen Prufung: 12.07.2011¨ ¨iiAbstractThereliabilityofinterconnectsonintegratedcircuits(IC)hasbecomeamajorprob-lem in recent years because of the rise of complexity, the low-k-insulating materialwith reduced stability, and wear-out-effects from high current densities. The totalreliability of a system on a chip is increasingly influenced by the reliability of theinterconnections, which is caused by increased communication from the elevatednumber of integrated functional units. In recent years, studies have predicted thatstatic faults will occur more often decreasing the reliability and the mean time tofailure. The most published solutions aim to prevent dynamic faults and to correcttransient faults. However, built-in self-repair (BISR) as a solution for static faultshas not previously been discussed along with the other possible solutions. Theo-retically, BISR can lead to higher reliability and lifetime.