Development of high speed integrated circuit for very high resolution timing measurements [Elektronische Ressource] / von Christian Mester. Universität Bonn, Physikalisches Institut

..UNIVERSITAT BONNPhysikalisches InstitutDevelopment of high speed integrated circuit for very highresolution timing measurementsvonChristian MesterAmulti-channelhigh-precisionlow-powertime-to-digitalconverterappli-cation specific integrated circuit for high energy physics applications hasbeen designed and implemented in a 130nm CMOS process. To reach atarget resolution of 24.4ps, a novel delay element has been conceived.This nominal resolution has been experimentally verified with a prototy-pe,withaminimumresolutionof19ps.Tofurtherimprovetheresolution,a new interpolation scheme has been described.The ASIC has been designed to use a reference clock with the LHCbunch crossing frequency of 40MHz and generate all required timingsignalsinternally,toeasetousewithintheframeworkofanLHCupgrade.Special care has been taken to minimise the power consumption.Post address: BONN-IR-2009-09Nussallee 12 Bonn University53115 Bonn October 2009Germany ISSN-0172-8741..UNIVERSITAT BONNPhysikalisches InstitutDevelopment of high speed integrated circuit for very highresolution timing measurementsvonChristian MesterDieser Forschungsbericht wurde als Dissertation von der Mathematisch - NaturwissenschaftlichenFakultat der Universitat Bonn angenommen.¨ ¨Angenommen am: 22. Oktober 2009Referent: Dr. Paulo Rodrigues S. MoreiraKorreferent: Prof. Dr.