Automated conversion from LUT-based FPGAs to LUT-based MPGAs [Elektronische Ressource] / von Francisco Javier Veredas Ramirez

Automated Conversion from LUT-based FPGAs to LUT-based MPGAs DISSERTATION zur Erlangung des akademischen Grades eines DOKTOR-INGENIEURS (DR.-ING.) der Fakultät für Ingenieurwissenschaften und Informatik der Universität Ulm von FRANCISCO JAVIER VEREDAS RAMIREZ AUS MANRESA (SPANIEN) 1. Gutachter: Prof. Dr.-Ing. Hans-Jörg Pfleiderer 2. Gutachter: Prof. Dr.-Ing. Ulf Schlichtmann Amtierender Dekan: Prof. Dr. rer. nat. Helmuth Partsch Ulm, 15.März 2007 to my mother, sister and niecesAbstractField-programmablegate-arrays(FPGAs)areusedforapplication-specificstan-dard product (ASIC) prototyping or small volume products. In medium tolarge volume products, the prototyping design or the small volume prod-uct is converted to another integrated circuit (IC) structure such as mask-programmable gate arrays (MPGAs). MPGAs are of growing importancebecause of the increase of design cost, and turnaround times in ultra-deepsubmicron technologies which mostly impact ASICs. Several design method-ologies have been proposed in recent years for converting an evaluated FPGAprototype-designintoanMPGA.TheMPGAdesignusespotentiallylessarea,delay, and dynamic power consumption than the FPGA design.In a conversion from an FPGA design, the engineer looks for a simple flow tominimize time-to-market. It is well known that the most time consuming pro-cessinanICdesignisverification.