XCORE XS1 Architecture Tutorial

XCORE XS1 Architecture Tutorial(VERSION 1.1)2009/6/22Authors:DAVID MAYHENK MULLERCopyright © 2009, XMOS Ltd.All Rights ReservedXMOS 1/341 IntroductionAn XS1 combines a number of XCore processors, each with its own memory,on a single chip. The programmable are general purpose in thesense that they can execute languages such as C; they also have direct supportfor concurrent processing (multi-threading), communication and input-output. Ahigh-performance switch supports communication between the processors, andinter-chip links are provided so that systems can easily be constructed frommultiple chips.The XS1 products are intended to make it practical to use software to performmany functions which would normally be done by hardware; an important exam-ple is interfacing and input-output controllers.Each XCore has hardware support for executing several concurrent threads.Each thread has access to a private set of registers. All threads share access toall other resources available on the core.Instructions are provided to support initialisation, termination, starting, synchro-nising and stopping threads; also there are instructions to provide input-outputand inter-thread communication.The set of threads on each XCore can be used:• to implement input-output controllers executed concurrently with applica-tions software.• to allow communications or input-output to progress together with process-ing.• to allow latency hiding by allowing some threads to ...